Liam
1
求老铁们帮忙看看是哪里弄错了,指导下,非常感谢!
问题描述
1.按照韦老师教程中的第一个 Bootloader (重定位 Vector) 工程尝试启动自己的 F103_Mini 板应用程序时发现跳转到APP地址后,应用程序执行异常;
2.应用程序烧录在 Flash 起始地址时程序运行没问题;
3.通过查看反汇编文件和使用 Keil 调试查看 Flash 内容可以确定 App 和 Bootloader 正常烧录在指定的位置; (Bootloader: 0x08000000, App: 0x08008000)
4.Bootloader 工程包含两个文件: startup.s , bootloader.c
5.文件内容如下:
/* startup.s */
------------------------------------------------------------------------------------------------------------
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD 0
DCD Reset_Handler ; Reset Handler
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT mymain
LDR SP, =(0x20000000+0x1000)
BL mymain
ENDP
ALIGN
start_app PROC
EXPORT start_app
ldr r3, =0xE000ED08
str r0, [r3]
ldr sp, [r0]
ldr r1, [r0, #4]
BX r1
ENDP
END
/* bootloader.c */
----------------------------------------------------------------------------------------
extern void start_app(unsigned int new_vector);
void mymain(void)
{
unsigned int new_vector = 0x08008000;
start_app(new_vector);
}
这个看不出来啥……估计别的地方,像链接文件这些,是不是没有弄好?
Liam
5
问题解决了,感谢交流群中 “小,圣” 兄弟的热情指导,拜谢!
Bootloader 工程的代码没问题,是 App 工程中启动文件调用的 SystemInit 函数中会写寄存器 SCB->VTOR 为默认值,导致Bootloader 中对 Vector 的重定位无效。在该函数中注释掉相关赋值语句即可解决故障。
见如下代码段:
/***************************************************************/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#ifndef STM32F10X_CL
RCC->CFGR &= (uint32_t)0xF8FF0000;
#else
RCC->CFGR &= (uint32_t)0xF0FF0000;
#endif /* STM32F10X_CL */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= (uint32_t)0xFF80FFFF;
#ifdef STM32F10X_CL
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= (uint32_t)0xEBFFFFFF;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000;
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000;
#endif /* STM32F10X_CL */
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif /* Commented For Bootloader; [2022.11.04] */
}
/***************************************************************/
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